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// ***************************
// * DO NOT MODIFY THIS FILE *
// ***************************

`timescale 1ps/1ps

module gt_common_gen #(
    //
)(
    // Transceiver common block ports
    input         reset_all_in        , 
    input         gtrefclk00_in       ,
    input         gtrefclk01_in       ,
    input         qpll0reset_in       ,
    
    input         freerun_clk_in      ,

    input  [24:0] sdm1data_in         ,
    input         sdm1reset_in        ,
    input         sdm1toggle_in       ,
    input  [ 1:0] sdm1width_in        ,
    
    output [ 0:0] txn_out             ,
    output [ 0:0] txp_out             ,
    output        qpll0lock_out       ,
    output        qpll0outclk_out     ,
    output        qpll0outrefclk_out  ,
    output        rxoutclk_out        ,
    output        txoutclk_out     
);

    gtwizard_top gtwizard_top_inst (
        .gtrefclk00_in                  (gtrefclk00_in          ),  //input         gtrefclk00_in        ,
        .gtrefclk01_in                  (gtrefclk01_in          ),  //input         gtrefclk01_in        ,
        .gtwiz_reset_clk_freerun_in     (freerun_clk_in         ),  //input         gtwiz_reset_clk_freerun_in        ,
        .reset_all_in                   (reset_all_in           ),  //input         reset_all_in         ,
        .txn_out                        (txn_out                ),  //output [1:0]  txn_out            ,
        .txp_out                        (txp_out                ),  //output [1:0]  txp_out            ,

        .sdm1data_in                    (sdm1data_in            ),  //input  [24:0] sdm1data_in         ,
        .sdm1reset_in                   (sdm1reset_in           ),  //input         sdm1reset_in        ,
        .sdm1toggle_in                  (sdm1toggle_in          ),  //input         sdm1toggle_in       ,
        .sdm1width_in                   (sdm1width_in           ),  //input  [ 1:0] sdm1width_in        ,
        .qpll0lock_out                  (qpll0lock_out          ),  //output        qpll0lock_out       ,
        .qpll0outclk_out                (qpll0outclk_out        ),
        .qpll0outrefclk_out             (qpll0outrefclk_out     ),
        .qpll0reset_in                  (qpll0reset_in          ),  //input         qpll0reset_in       ,

        .rxoutclk_out                   (rxoutclk_out           ),
        .txoutclk_out                   (txoutclk_out           )
    );

endmodule

